1. Field of the Invention
This invention relates to interconnects formed in semiconductor devices, and more particularly to copper interconnects formed in Inter-Metallic Dielectric (IMD) layers.
2. Description of Related Art
As semiconductor device dimensions are constantly being scaled down to the deep submicron regime, the current metallization scheme requires revision.
U.S. Pat. No. 5,674,787 of Zhao et al. for xe2x80x9cSelective Electroless Copper Deposited Interconnect Plugs for ULSI Applicationsxe2x80x9d shows selective Cu electroless deposition in a via trench hole using a seed layer. An electroless copper deposition method selectively forms encapsulated copper plugs to connect conductive regions of a semiconductor device. A contact displacement technique forms a thin activation copper layer on a barrier metal layer, e.g. TiN, which is present as a covering layer on an underlying metal layer. Copper is deposited in the via by an electroless auto-catalytic process. Electroless copper deposition continues until the via is almost filled which leaves sufficient room at the top for an upper encapsulation to be formed there, but first the device is rinsed in DI (deionized) water to remove the electroless deposition solution. Then after the rising away of the electroless copper solution, a cap barrier layer, from 500 xc3x85 to about 1500 xc3x85 thick, is formed of a variety of metals or metal alloys such as Ni, Co, Nixe2x80x94Co alloy, CoP, NiCoP, or NiP from another electroless solution. The bottom barrier layer and the cap barrier layer complete the full encapsulation of the copper plug via.
U.S. Pat. No. 5,470,789 of Misawa for xe2x80x9cProcess for Fabricating Integrated Circuit Devicesxe2x80x9d produces a TiN/Cu interconnect having a capping layer formed of TiN unlike the copper alloy metal cap layer of this invention.
An interconnect line on an IMD layer on a semiconductor device is formed in an interconnect hole in the IMD layer. The interconnect hole has walls and a bottom in the IMD layer. A diffusion barrier is formed on the walls and the bottom of the hole. Deposit copper to fill the interconnect hole with a copper metal plug. A passivating metal layer is deposited selectively on the surface of the copper metal deposit encapsulating the copper metal plug.
Alternatively, a blanket deposit of a copper metal layer covers the diffusion layer and fills the interconnect hole with a copper metal deposit. Perform a CMP process to planarize the device to remove both copper and the barrier metal at the IMD layer. Depositing a passivating metal layer on the surface of the copper metal deposit encapsulating the copper metal at the top of the hole in a self-aligned deposition process.